a1 Department of Electrical Engineering and Information Systems, University of Tokyo, Bunkyo, Tokyo 113-8656, Japan
The heterogeneous integration of III-V semiconductors with the Si platform is expected to provide high performance CMOS logic for future technology nodes because of high electron mobility and low electron effective mass in III-V semiconductors. However, there are many technology issues to be addressed for integrating III-V MOSFETs on the Si platform as follow; high-quality MOS interface formation, low resistivity source/drain formation, and high-quality III-V film formation on Si substrates. In this paper, we present several possible solutions for the above critical issues of III-V MOSFETs on the Si platform. In addition, we present the III-V CMOS photonics platform on which III-V MOSFETs and III-V photonics can be monolithically integrated for ultra-large scale electric-optic integrated circuits.
(Online publication July 13 2011)