MRS Bulletin

Technical Feature

Technical Feature

Current Status of Ferroelectric Random-Access Memory

Yoshihiro Arimoto and Hiroshi Ishiwara

Abstract

The current status of ferroelectric random-access memory (FeRAM) technology is reviewed in this article. Presented first is the status of conventional FeRAM, in which the memory cells are composed of ferroelectric capacitors to store the data and cell-selection transistors to access the selected capacitors. Discussed next are recent developments in the field. Pb(Zrx, Ti1–x)O3 (PZT) and SrBi2Ta2O9 (SBT) films are being used to produce 0.13 mμ and 0.18 μm FeRAM cells, respectively, with a stacked capacitor configuration; these cells are easily embedded into logic circuits. A new class of FeRAM called 6T4C—containing static RAM (SRAM) cells composed of six transistors (6T) and four ferroelectric capacitors (4C)—has been commercially produced. This type of FeRAM features a nondestructive readout operation, unlimited read/write cycling, and a fast access time of less than 10 ns. Lastly, the status of field-effect-transistor (FET)-type FeRAM is reviewed, emphasizing that the data retention time of a ferroelectric-gate FET has been improved to more than a month in recent studies.

Keywords

  • ferroelectric random-access memory;
  • FeRAM;
  • nonvolatile static random-access memory;
  • NVSRAM.

Yoshihiro Arimoto received a BS degree in electronic engineering from Nagoya Institute of Technology, and MS and PhD degrees in physical electronic engineering from the Tokyo Institute of Technology in 1977 and 1994, respectively. In 1977, he joined Fujitsu Laboratories Ltd. in Kawasaki, Japan, and has been engaged in research on silicon-oninsulator technology, chemical-mechanical polishing processes, and nonvolatile randomaccess memories, particularly ferroelectric RAM and magnetic RAM, in the Electron Devices and Materials Laboratories. He is currently a senior research fellow in the System LSI Development Laboratories, Kawasaki, Japan.

Arimoto can be reached by e-mail at arimoto@jp.fujitsu.com.

Hiroshi Ishiwara is a professor and dean of the Interdisciplinary Graduate School of Science and Engineering at the Tokyo Institute of Technology (TIT). His research interests are in the areas of device and process technologies in integrated circuits with a focus on ferroelectric memories. He received BS, MS, and PhD degrees in electronic engineering from TIT in 1968, 1970, and 1973, respectively. He joined the TIT engineering faculty as a research associate in 1973; he became an associate professor of the Interdisciplinary Graduate School of Science and Engineering in 1976, a professor in the Precision and Intelligence Laboratory in 1989, and served as a professor in the Frontier Collaborative Research Center from 1998 to 2004. He was appointed to his current position in April of this year.

Ishiwara has been awarded the Japan IBM Science Prize, the Inoue Prize for Science, the Ichimura Prizes in Technology-Meritorious Achievement Prize, the International Symposium on Integrated Ferroelectrics 2000 Honors, and the Purple Ribbon Medal from the Japanese government. He is a fellow of IEEE and IEICE and a member of the Materials Research Society, the Electrochemical Society, the Japan Society of Applied Physics, and the Institute of Electrical Engineers of Japan.

Ishiwara can be reached by e-mail at ishiwara@pi.titech.ac.jp.

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